1. Field of the Invention
The present invention relates to a load capacity driving circuit. In particular, the present invention relates to a load capacity driving circuit that is suitable for driving a display device such as an LCD (liquid crystal display) or the like.
2. Description of the Related Art
As the screen sizes of liquid crystal display devices have become larger in recent years, improvements in the various performances of driving devices that drive LCDs also are demanded. In particular, as the screen sizes of liquid crystal display devices become larger, the load capacities of the data lines of the LCD are becoming larger. For this reason, improving the driving capability of the driving device has come to be important. Further, recently, competition in the field of liquid crystal display devices has become more fierce, and the costs of the respective mounted parts must be reduced. Accordingly, LCD driving devices that have a high driving capability and are inexpensive are demanded.
In relation thereto, Japanese Patent Application Laid-Open (JP-A) No. 2003-122325 discloses a technique of suppressing the amount of consumed electric power of a device. In this technique, when the difference in input and output signals of an output operational amplifier is compared at a comparator and the input signal is lower than the output signal by greater than or equal to a predetermined threshold voltage, an enable signal is outputted from the comparator, a switching transistor is turned on, and a large-current source is made effective. The output current at the time of discharging a load capacity can thereby be varied.
Further, a technique of reducing the on resistance of an output transistor is disclosed in FIG. 7 and in paragraph 0072 of JP-A No. 05-041651. In this technique, transistors of the output stage of an operational amplifier are provided in parallel in order to improve the current supplying capability.
In the technique of JP-A No. 2003-122325, at the time when the input signal is lower than the output signal by greater than or equal to the predetermined threshold voltage, discharging of the load capacity can be carried out rapidly. However, the operation until the input signal becomes lower than the output signal by greater than or equal to the predetermined threshold voltage is the same as conventional operation. Therefore, the efficacy of the above technique is very low, in a case in which the range of the output voltage is wide. Further, a structure for rapidly carrying out charging of a load capacity is not disclosed in JP-A No. 2003-122325.
The technique of JP-A No. 05-041651 includes a charging operation and a discharging operation. However, at the respective separate paths thereof, there is the need for control in accordance with either of the separate signals, and as a result, the structure of the control circuit becomes complex and an increase in surface area is brought about. Further, even if control is carried out merely by turning a transistor on and off, rapid response cannot be expected of a transistor that handles large current, and high-speed control is difficult.